In the semiconductor manufacturing industry, large numbers of electronic devices are fabricated on a semiconductor substrate. With higher integration densities that occur with each new design node, devices are becoming increasingly packed together using smaller and smaller geometries with reduced spacing between features and higher aspect ratios, posing various process challenges.
One such challenge exists in the provision of antireflective materials such as a bottom antireflective coating (BARC) material over a substrate, the surface of which includes gaps, for example, trenches, holes, spacing between lines, and the like. BARC materials are typically used in photolithography as a photoresist underlayer to minimize the reflection of light from the substrate surface into the overcoated photoresist layer during exposure. Conventional BARC materials, however, are generally not suitable for use in the filling of small, high aspect ratio gaps in a substantially void-free manner and providing a planarized surface. The presence of voids can result in defects and otherwise adversely impact device reliability. For example, the formation of voids can lead to patterning defects in imaging an overcoated photoresist layer, resulting in reduced device yields. In addition, void formation can cause a worsening in etch uniformity between isolated (iso) and dense pattern areas, resulting in substrate damage by over etching in the iso pattern area. Where the filled gaps are intended to provide a device isolation function, void formation can result in current leakage between adjacent devices. To minimize defects in the formed devices, it is desirable that the gaps be filled in a substantially void-free manner. This, however, can be difficult given the reduced device geometries and constraints in BARC materials and process conditions.
To address the challenge of providing a BARC underlayer over a substrate surface containing gaps, a multi-step process employing separate steps of coating a gap-fill material and then a BARC material over the gap-fill material has been proposed. See, e.g., S. Takeia et al, High-etch-rate bottom-antireflective coating and gap fill materials using dextrin derivatives in via first dual-damascene lithography process, Advances in Resist Materials and Processing Technology XXV, Proc. of SPIE Vol. 6923, 69232P, (2008). This document discloses a dual damascene process involving coating a thick layer of a planarizing gap-fill material over the substrate to fill the gaps, followed by coating of a BARC material over the gap-filled substrate surface. A photoresist layer is then coated over the BARC layer and a resist pattern is formed by exposure and development processes, followed by pattern transfer by etching. This process is disadvantageous in the total number of process steps required, resulting in poor process throughput. The relatively high number of process steps also raises the potential for defects resulting from particle generation.
There is a continuing need in the semiconductor manufacturing industry for improved methods which are useful in the filling of small gaps and which provide antireflective properties, and that address one or more problems associated with the state of the art.